EDN

Creating a custom processor with RISC-V

With its blend of open-source freedoms with the benefits of standardization, the RISC-V (risk-five) Foundation is attracting widespread industry interest. Its core specifications are stable and on the ...
Design-Reuse

Codasip Releases a Major Upgrade of Its Studio Processor Design Toolset with a Tutorial RISC-V core

Munich, Germany – April 13 th, 2021 – Codasip, the leading supplier of processor design solutions and customizable RISC-V processor IP, is pleased to announce the availability of Codasip Studio 9.0 ...
Semiconductor Engineering

How to Connect Questa VIP to the Processor Verification Flow

Learn how to incorporate Questa VIP into your existing RISC-V verification flow. This step-by-step tutorial, prepared by Codasip’s verification experts, explains the concepts of combining ...
Hosted on MSN

What is RISC-V, and why does Vitalik Buterin want it for Ethereum smart contracts?

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...
Finanznachrichten

OneSpin Addresses the Challenges of RISC-V Verification Through Series of Speaking Engagements, Workshop, and Tutorials

Series designed to help developers and integrators effectively verify RISC-V integrity: functional correctness, safety, security, and trust OneSpin Solutions, provider of certified IC integrity ...